分类：未分类

@echo off
setlocal enabledelayedexpansion
echo ================
echo.

if not exist “code\” (
echo Error:code file not exit!
pause
exit /b 1
)

REM 确保目标目录存在
if not exist “D:\decode\” mkdir “D:\decode\”

set BATCH_SIZE=50
set CURRENT_BATCH=0
set TOTAL_FILES=0

echo Scanning code folder…
echo.

REM 先统计code文件夹内的文件总数
for /r “code” %%f in (*) do set /a TOTAL_FILES+=1

echo Find %TOTAL_FILES% Files in code folder…
echo Start Copy…
echo.

set COUNT=0
for /r “code” %%f in (*) do (
set /a COUNT+=1
set /a CURRENT_BATCH+=1

REM 显示进度
set /a PERCENT=COUNT*100/TOTAL_FILES
echo [!PERCENT!%%] [!COUNT!/!TOTAL_FILES!] Copy: %%~nxf

REM 计算相对于code文件夹的路径
set “FULL_PATH=%%f”
REM 去掉前面的”code\”部分
set “REL_PATH=!FULL_PATH:*\code\=!”

REM 在目标目录创建相同结构
set “TARGET_PATH=D:\decode\!REL_PATH!”
set “TARGET_DIR=!TARGET_PATH:\%%~nxf=!”

if not exist “!TARGET_DIR!” mkdir “!TARGET_DIR!”

REM 执行本地复制
copy “%%f” “!TARGET_PATH!” >nul

REM 每复制50个文件显示一次
if !CURRENT_BATCH! equ !BATCH_SIZE! (
echo.
echo Copy !BATCH_SIZE! Files…
set CURRENT_BATCH=0
)
)

echo.
echo Copy Done !COUNT! Files!
@echo off
setlocal enabledelayedexpansion
echo ====== Folder Verification Only ======
echo.

if not exist “code\” (
echo Error: code folder not exist!
pause
exit /b 1
)

if not exist “D:\decode\” (
echo Error: decode folder not exist!
pause
exit /b 1
)

set TOTAL_FILES=0
set SAME_COUNT=0
set DIFF_COUNT=0
set MISSING_COUNT=0
set EXTRA_COUNT=0

echo Scanning folders…
echo.

REM 统计源文件夹文件数
for /r “code” %%f in (*) do set /a TOTAL_FILES+=1

echo Source folder has !TOTAL_FILES! files
echo Starting verification…
echo.

REM 校验每个文件
set COUNT=0
for /r “code” %%f in (*) do (
set /a COUNT+=1

set “FULL_PATH=%%f”
set “REL_PATH=!FULL_PATH:*\code\=!”
set “TARGET_PATH=D:\decode\!REL_PATH!”

set /a PERCENT=COUNT*100/TOTAL_FILES
echo [!PERCENT!%%] Checking: !REL_PATH!

if exist “!TARGET_PATH!” (
fc “%%f” “!TARGET_PATH!” >nul
if errorlevel 1 (
set /a DIFF_COUNT+=1
echo [DIFFERENT]
) else (
set /a SAME_COUNT+=1
)
) else (
set /a MISSING_COUNT+=1
echo [MISSING]
)
)

REM 检查目标文件夹中多出的文件
for /r “D:\decode” %%f in (*) do (
set “FULL_PATH=%%f”
set “REL_PATH=!FULL_PATH:D:\decode\=!”
set “SOURCE_PATH=%cd%\code\!REL_PATH!”

if not exist “!SOURCE_PATH!” (
set /a EXTRA_COUNT+=1
)
)

echo.
echo ====== Verification Result ======
echo Total files in code: !TOTAL_FILES!
echo Files match: !SAME_COUNT!
echo Files different: !DIFF_COUNT!
echo Files missing in decode: !MISSING_COUNT!
echo Extra files in decode: !EXTRA_COUNT!
echo.

if !DIFF_COUNT! equ 0 if !MISSING_COUNT! equ 0 if !EXTRA_COUNT! equ 0 (
echo RESULT: VERIFICATION PASSED
) else (
echo RESULT: VERIFICATION FAILED
)

pause

7E33E9

//服务器宿主 cmd下（管理员运行）
netsh interface portproxy reset

netsh interface portproxy add v4tov4 ^
listenaddress=0.0.0.0 listenport=9100 ^
connectaddress=192.168.200.128 connectport=9100

netsh interface portproxy add v4tov4 ^
listenaddress=0.0.0.0 listenport=9111 ^
connectaddress=192.168.200.128 connectport=9111

netsh interface portproxy add v4tov4 ^
listenaddress=0.0.0.0 listenport=3111 ^
connectaddress=192.168.200.128 connectport=3111

netsh interface portproxy add v4tov4 ^
listenaddress=0.0.0.0 listenport=3112 ^
connectaddress=192.168.200.128 connectport=3112

netsh interface portproxy add v4tov4 ^
listenaddress=0.0.0.0 listenport=3113 ^
connectaddress=192.168.200.128 connectport=3113

netsh interface portproxy add v4tov4 ^
listenaddress=0.0.0.0 listenport=3114 ^
connectaddress=192.168.200.128 connectport=3114

netsh interface portproxy add v4tov4 ^
listenaddress=0.0.0.0 listenport=3115 ^
connectaddress=192.168.200.128 connectport=3115

netsh interface portproxy add v4tov4 ^
listenaddress=0.0.0.0 listenport=3116 ^
connectaddress=192.168.200.128 connectport=3116

netsh interface portproxy add v4tov4 ^
listenaddress=0.0.0.0 listenport=3117 ^
connectaddress=192.168.200.128 connectport=3117

netsh interface portproxy add v4tov4 ^
listenaddress=0.0.0.0 listenport=3118 ^
connectaddress=192.168.200.128 connectport=3118

netsh interface portproxy add v4tov4 ^
listenaddress=0.0.0.0 listenport=5003 ^
connectaddress=192.168.200.128 connectport=5003

netsh interface portproxy add v4tov4 ^
listenaddress=0.0.0.0 listenport=5004 ^
connectaddress=192.168.200.128 connectport=5004

netsh interface portproxy show all

右键“此电脑” → “管理”

左侧导航到：系统工具 → 任务计划程序

点击右侧 “创建任务”（不是“创建基本任务”）

在 “常规” 选项卡：

勾选 “不管用户是否登录都要运行”

勾选 “使用最高权限运行”

选择 “配置为：Windows 10”（根据系统）

在 “触发器” 选项卡：

新建 → 开始任务：按计划

设置：每天，时间：3:00:00

在 “操作” 选项卡：

新建 → 操作：启动程序

程序/脚本：shutdown

参数：/r /f /t 0

cd ~/openvpn-ca
./easyrsa gen-req client_name nopass
./easyrsa sign-req client client_name

将client_name.crt和client_name.key文件拷贝到openvpn文件
分别位于~/openvpn-ca/pki/issued/client_name.crt
~/openvpn-ca/pki/private/client1.key

1.确保已安装 exFAT 支持
sudo apt update
sudo apt install exfat-fuse exfatprogs

2.获取 TF 卡信息，获取UUID等
sudo blkid /dev/mmcblk1p1
比如返回 /dev/mmcblk1p1: UUID=”3931-6530″ BLOCK_SIZE=”512″ TYPE=”exfat”

3.编辑 fstab
sudo vi /etc/fstab

4.在文件末尾添加以下内容
# TF Card Auto Mount (exFAT)
UUID=3931-6530 /mnt/tfcard exfat defaults,uid=1000,gid=1000,umask=000,noatime 0 0

string hexString = “0x01”;
int number = Convert.ToInt32(hexString, 16);
Console.WriteLine(number); // 输出: 1

在cmd夏输入 reg delete “HKEY_CURRENT_USER\Software\Scooter Software\Beyond Compare 4” /v CacheID /f

/sdk/orangepi-build/kernel/orange-pi-5.10-rk35xx/arch/arm64/boot/dts/rockchip/rk3566-orangepi-3b-v2.dts

// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2020 Rockchip Electronics Co., Ltd.
*
*/
/dts-v1/;

#include #include #include #include #include #include #include #include “rk3566.dtsi”
#include “rk3568-linux.dtsi”

/ {
model = “Rockchip RK3566 OPi 3B”;
compatible = “rockchip,rk3566-orangepi-3b”, “rockchip,rk3566”;

chosen: chosen {
bootargs = “earlycon=uart8250,mmio32,0xfe660000 console=ttyFIQ0 isolcpus=3”;
};

/* labeled +12v in schematic */
vcc12v_dcin: vcc12v-dcin-regulator {
compatible = “regulator-fixed”;
regulator-name = “vcc12v_dcin”;
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
};

/* labeled +5v in schematic */
vcc_5v: vcc-5v-regulator {
compatible = “regulator-fixed”;
regulator-name = “vcc_5v”;
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc12v_dcin>;
};

vbus: vbus {
compatible = “regulator-fixed”;
regulator-name = “vbus”;
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};

/* labeled +3.3v For PCIe only in schematic */
vcc3v3_pcie: vcc3v3-pcie-regulator {
compatible = “regulator-fixed”;
regulator-name = “vcc3v3_pcie”;
regulator-always-on;
regulator-boot-on;
enable-active-high;
gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
pinctrl-names = “default”;
pinctrl-0 = <&pcie_drv>;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc12v_dcin>;
};

hdmi_sound: hdmi-sound {
compatible = “simple-audio-card”;
simple-audio-card,format = “i2s”;
simple-audio-card,mclk-fs = <128>;
simple-audio-card,name = “rockchip,hdmi”;
status = “disabled”;

simple-audio-card,cpu {
sound-dai = <&i2s0_8ch>;
};
simple-audio-card,codec {
sound-dai = <&hdmi>;
};
};

key_irq {
compatible = “alientek,key”;
pinctrl-0 = <&key_irq_gpio>;
pinctrl-names = “alientek,key”;
misckey-gpio = <&gpio3 RK_PD2 GPIO_ACTIVE_HIGH>;
interrupt-parent = <&gpio3>;
interrupts = <26 IRQ_TYPE_EDGE_BOTH>;
status = “okay”;
};

miscled {
compatible = “alientek,miscled”;
miscled-gpio = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>;
status = “okay”;
};

leds: leds {
compatible = “gpio-leds”;
pinctrl-names = “default”;
pinctrl-0 =<&leds_gpio>;

led@1 {
gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>;
label = “status_led”;
linux,default-trigger = “heartbeat”;
};

};

rk809_sound: rk809-sound {
status = “okay”;
compatible = “rockchip,multicodecs-card”;
rockchip,card-name = “rockchip-rk809”;
hp-det-gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_LOW>;
rockchip,format = “i2s”;
rockchip,mclk-fs = <256>;
rockchip,cpu = <&i2s1_8ch>;
rockchip,codec = <&rk809_codec>;
pinctrl-names = “default”;
pinctrl-0 = <&hp_det>;
};

vcc3v3_sys: vcc3v3-sys {
compatible = “regulator-fixed”;
regulator-name = “vcc3v3_sys”;
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vbus>;
};

vcc5v0_sys: vcc5v0-sys {
compatible = “regulator-fixed”;
regulator-name = “vcc5v0_sys”;
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vbus>;
};

vcc5v0_usb: vcc5v0-usb {
compatible = “regulator-fixed”;
regulator-name = “vcc5v0_usb”;
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vbus>;
};

sdio_pwrseq: sdio-pwrseq {
compatible = “mmc-pwrseq-simple”;
clocks = <&rk809 1>;
clock-names = “ext_clock”;
pinctrl-names = “default”;
pinctrl-0 = <&wifi_enable_h>;

/*
* On the module itself this is one of these (depending
* on the actual card populated):
* – SDIO_RESET_L_WL_REG_ON
* – PDN (power down when low)
*/
post-power-on-delay-ms = <200>;
reset-gpios = <&gpio0 RK_PD3 GPIO_ACTIVE_LOW>;
};

test-power {
status = “okay”;
};

wireless_wlan: wireless-wlan {
compatible = “wlan-platdata”;
rockchip,grf = <&grf>;
wifi_chip_type = “ap6256”;
WIFI,host_wake_irq = <&gpio0 RK_PD6 GPIO_ACTIVE_HIGH>;
status = “okay”;
};

wireless_bluetooth: wireless-bluetooth {
compatible = “bluetooth-platdata”;
clocks = <&rk809 1>;
clock-names = “ext_clock”;
uart_rts_gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
pinctrl-names = “default”, “rts_gpio”;
pinctrl-0 = <&uart1m0_rtsn>;
pinctrl-1 = <&uart1_gpios>;
BT,reset_gpio = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
BT,wake_gpio = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
BT,wake_host_irq = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
status = “okay”;
};

vcc_camera_ov5647: vcc-camera-ov5647 {
status = “okay”;
compatible = “regulator-fixed”;
regulator-name = “vcc_camera_ov5647”;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
};

ext_cam_ov5647_clk: external-camera-ov5647-clock {
compatible = “fixed-clock”;
clock-frequency = <25000000>;
clock-output-names = “ext_cam_ov5647_clk”;
#clock-cells = <0>;
};

vcc_sd: vcc-sd {
compatible = “regulator-fixed”;
regulator-max-microvolt = <3300000>;
regulator-min-microvolt = <3300000>;
regulator-name = “vcc_sd”;
vin-supply = <&vcc3v3_sys>;
};

vccio_phy: vcc-phy-regulator {
compatible = “regulator-fixed”;
regulator-max-microvolt = <1800000>;
regulator-min-microvolt = <1800000>;
regulator-name = “vccio_phy”;
regulator-always-on;
regulator-boot-on;
};

vcc5v0_host: vcc5v0-host-regulator {
compatible = “regulator-fixed”;
enable-active-high;
gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
pinctrl-names = “default”;
pinctrl-0 = <&vcc5v0_host_en>;
regulator-name = “vcc5v0_host”;
regulator-always-on;
};

vcc5v0_otg: vcc5v0-otg-regulator {
compatible = “regulator-fixed”;
enable-active-high;
gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
pinctrl-names = “default”;
pinctrl-0 = <&vcc5v0_otg_en>;
regulator-name = “vcc5v0_otg”;
regulator-always-on;
};

fan: pwm-fan {
compatible = “pwm-fan”;
#cooling-cells = <2>;
pwms = <&pwm7 0 20000000 0>;
cooling-levels = <0 50 100 150 200 255>;
rockchip,temp-trips = < 50000 1 55000 2 60000 3 65000 4 70000 5 >;

status = “okay”;
};

backlight: backlight {
compatible = “pwm-backlight”;
pwms = <&pwm2 0 25000 0>;
brightness-levels = < 0 20 20 21 21 22 22 23 23 24 24 25 25 26 26 27 27 28 28 29 29 30 30 31 31 32 32 33 33 34 34 35 35 36 36 37 37 38 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 >;
default-brightness-level = <200>;
};

edp-panel {
compatible = “simple-panel”;
backlight = <&backlight>;
prepare-delay-ms = <120>;
enable-delay-ms = <120>;
unprepare-delay-ms = <120>;
disable-delay-ms = <120>;

display-timings {
native-mode = <&edp_timing>;

edp_timing: timing0 {
clock-frequency = <125000000>;
hactive = <1920>;
vactive = <1080>;
hback-porch = <180>;
hfront-porch = <120>;
vback-porch = <10>;
vfront-porch = <10>;
hsync-len = <20>;
vsync-len = <10>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};

port {
panel_in_edp: endpoint {
remote-endpoint = <&edp_out_panel>;
};
};
};
};

&bus_npu {
bus-supply = <&vdd_logic>;
pvtm-supply = <&vdd_cpu>;
status = “okay”;
};

&cpu0 {
cpu-supply = <&vdd_cpu>;
};

&dfi {
status = “okay”;
};

&dmc {
center-supply = <&vdd_logic>;
status = “disabled”;
};

&gpu {
mali-supply = <&vdd_gpu>;
status = “okay”;
};

&hdmi {
status = “okay”;
rockchip,phy-table =
<92812500 0x8009 0x0000 0x0270>,
<165000000 0x800b 0x0000 0x026d>,
<185625000 0x800b 0x0000 0x01ed>,
<297000000 0x800b 0x0000 0x01ad>,
<594000000 0x8029 0x0000 0x0088>,
<000000000 0x0000 0x0000 0x0000>;
};

&hdmi_in_vp0 {
status = “okay”;
};

&hdmi_in_vp1 {
status = “disabled”;
};

&hdmi_sound {
status = “okay”;
};

&i2c0 {
status = “okay”;

vdd_cpu: syr837@40 {
compatible = “silergy,syr827”;
reg = <0x40>;
vin-supply = <&vcc5v0_sys>;
regulator-compatible = “fan53555-reg”;
regulator-name = “vdd_cpu”;
regulator-min-microvolt = <712500>;
regulator-max-microvolt = <1390000>;
regulator-init-microvolt = <900000>;
regulator-initial-mode = <1>;
regulator-ramp-delay = <2300>;
fcs,suspend-voltage-selector = <1>;
regulator-boot-on;
regulator-always-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};

rk809: pmic@20 {
compatible = “rockchip,rk809”;
reg = <0x20>;
interrupt-parent = <&gpio0>;
interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = “default”, “pmic-sleep”,
“pmic-power-off”, “pmic-reset”;
pinctrl-0 = <&pmic_int>;
pinctrl-1 = <&soc_slppin_slp>, <&rk817_slppin_slp>;
pinctrl-2 = <&soc_slppin_gpio>, <&rk817_slppin_pwrdn>;
pinctrl-3 = <&soc_slppin_gpio>, <&rk817_slppin_rst>;

rockchip,system-power-controller;
wakeup-source;
#clock-cells = <1>;
clock-output-names = “rk808-clkout1”, “rk808-clkout2”;
//fb-inner-reg-idxs = <2>;
/* 1: rst regs (default in codes), 0: rst the pmic */
pmic-reset-func = <0>;
/* not save the PMIC_POWER_EN register in uboot */
not-save-power-en = <1>;

vcc1-supply = <&vcc3v3_sys>;
vcc2-supply = <&vcc3v3_sys>;
vcc3-supply = <&vcc3v3_sys>;
vcc4-supply = <&vcc3v3_sys>;
vcc5-supply = <&vcc3v3_sys>;
vcc6-supply = <&vcc3v3_sys>;
vcc7-supply = <&vcc3v3_sys>;
vcc8-supply = <&vcc3v3_sys>;
vcc9-supply = <&vcc3v3_sys>;

pwrkey {
status = “okay”;
};

pinctrl_rk8xx: pinctrl_rk8xx {
gpio-controller;
#gpio-cells = <2>;

rk817_slppin_null: rk817_slppin_null {
pins = “gpio_slp”;
function = “pin_fun0”;
};

rk817_slppin_slp: rk817_slppin_slp {
pins = “gpio_slp”;
function = “pin_fun1”;
};

rk817_slppin_pwrdn: rk817_slppin_pwrdn {
pins = “gpio_slp”;
function = “pin_fun2”;
};

rk817_slppin_rst: rk817_slppin_rst {
pins = “gpio_slp”;
function = “pin_fun3”;
};
};

regulators {
vdd_logic: DCDC_REG1 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <1350000>;
regulator-init-microvolt = <900000>;
regulator-ramp-delay = <6001>;
regulator-initial-mode = <0x2>;
regulator-name = “vdd_logic”;
regulator-state-mem {
regulator-off-in-suspend;
};
};

vdd_gpu: DCDC_REG2 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <1350000>;
regulator-init-microvolt = <900000>;
regulator-ramp-delay = <6001>;
regulator-initial-mode = <0x2>;
regulator-name = “vdd_gpu”;
regulator-state-mem {
regulator-off-in-suspend;
};
};

vcc_ddr: DCDC_REG3 {
regulator-always-on;
regulator-boot-on;
regulator-initial-mode = <0x2>;
regulator-name = “vcc_ddr”;
regulator-state-mem {
regulator-on-in-suspend;
};
};

vdd_npu: DCDC_REG4 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <1350000>;
regulator-init-microvolt = <900000>;
regulator-ramp-delay = <6001>;
regulator-initial-mode = <0x2>;
regulator-name = “vdd_npu”;
regulator-state-mem {
regulator-off-in-suspend;
};
};

vdda0v9_image: LDO_REG1 {
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
regulator-name = “vdda0v9_image”;
regulator-state-mem {
regulator-off-in-suspend;
};
};

vdda_0v9: LDO_REG2 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
regulator-name = “vdda_0v9”;
regulator-state-mem {
regulator-off-in-suspend;
};
};

vdda0v9_pmu: LDO_REG3 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
regulator-name = “vdda0v9_pmu”;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <900000>;
};
};

vccio_acodec: LDO_REG4 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-name = “vccio_acodec”;
regulator-state-mem {
regulator-off-in-suspend;
};
};

vccio_sd: LDO_REG5 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-name = “vccio_sd”;
regulator-state-mem {
regulator-off-in-suspend;
};
};

vcc3v3_pmu: LDO_REG6 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = “vcc3v3_pmu”;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <3300000>;
};
};

vcca_1v8: LDO_REG7 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = “vcca_1v8”;
regulator-state-mem {
regulator-off-in-suspend;
};
};

vcca1v8_pmu: LDO_REG8 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = “vcca1v8_pmu”;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <1800000>;
};
};

vcca1v8_image: LDO_REG9 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = “vcca1v8_image”;
regulator-state-mem {
regulator-off-in-suspend;
};
};

vcc_1v8: DCDC_REG5 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = “vcc_1v8”;
regulator-state-mem {
regulator-off-in-suspend;
};
};

vcc_3v3: SWITCH_REG1 {
regulator-always-on;
regulator-boot-on;
regulator-name = “vcc_3v3”;
regulator-state-mem {
regulator-off-in-suspend;
};
};

vcc3v3_sd: SWITCH_REG2 {
regulator-always-on;
regulator-boot-on;
regulator-name = “vcc3v3_sd”;
regulator-state-mem {
regulator-off-in-suspend;
};
};
};

rk809_codec: codec {
#sound-dai-cells = <1>;
compatible = “rockchip,rk809-codec”, “rockchip,rk817-codec”;
clocks = <&cru I2S1_MCLKOUT>;
clock-names = “mclk”;
assigned-clocks = <&cru I2S1_MCLKOUT>, <&cru I2S1_MCLK_TX_IOE>;
assigned-clock-rates = <12288000>;
assigned-clock-parents = <&cru I2S1_MCLKOUT_TX>, <&cru I2S1_MCLKOUT_TX>;
pinctrl-names = “default”;
pinctrl-0 = <&i2s1m0_mclk>;
hp-volume = <20>;
spk-volume = <3>;
mic-in-differential;
status = “okay”;
};
};
};

&uart1 {
status = “okay”;
pinctrl-names = “default”;
pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn>;
};

&uart3 {
status = “okay”;
pinctrl-names = “default”;
pinctrl-0 = <&uart3m0_xfer>;
dma-names = “tx”, “rx”;
};

&pwm7 {
status = “okay”;
};

&i2s0_8ch {
status = “okay”;
};

&i2s1_8ch {
status = “okay”;
rockchip,clk-trcm = <1>;
pinctrl-names = “default”;
pinctrl-0 = <&i2s1m0_sclktx &i2s1m0_lrcktx &i2s1m0_sdi0 &i2s1m0_sdo0>;
};

&iep {
status = “okay”;
};

&iep_mmu {
status = “okay”;
};

&jpegd {
status = “okay”;
};

&jpegd_mmu {
status = “okay”;
};

&mpp_srv {
status = “okay”;
};

&pinctrl {
wireless-bluetooth {
uart1_gpios: uart1-gpios {
rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};

sd {
sdmmc0_pwr_h: sdmmc0-pwr-h {
rockchip,pins =
<0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
};
};

mxc6655xa {
mxc6655xa_irq_gpio: mxc6655xa_irq_gpio {
rockchip,pins = <3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
};
};

pmic {
pmic_int: pmic_int {
rockchip,pins =
<0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
};

soc_slppin_gpio: soc_slppin_gpio {
rockchip,pins =
<0 RK_PA2 RK_FUNC_GPIO &pcfg_output_low>;
};

soc_slppin_slp: soc_slppin_slp {
rockchip,pins =
<0 RK_PA2 1 &pcfg_pull_none>;
};

soc_slppin_rst: soc_slppin_rst {
rockchip,pins =
<0 RK_PA2 2 &pcfg_pull_none>;
};
};

touch {
touch_gpio: touch-gpio {
rockchip,pins =
<0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>,
<0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
};
};

sdio-pwrseq {
wifi_enable_h: wifi-enable-h {
rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};

usb {
vcc5v0_host_en: vcc5v0-host-en {
rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
};

vcc5v0_otg_en: vcc5v0-otg-en {
rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};

wireless-bluetooth {
uart8_gpios: uart8-gpios {
rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
};
};

key-irq-gpios {
/omit-if-no-ref/
key_irq_gpio: key-irq-pin {
rockchip,pins = <3 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};

work-led {
leds_gpio: leds-gpio {
rockchip,pins = < 0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;

};
};

headphone {
hp_det: hp-det {
rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_down>;
};
};

pcie {
pcie_drv: pcie-drv {
rockchip,pins =
<0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
};
};

edp {
edp_hpd: edp-hpd {
rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
};

bl_en: bl-en {
rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_output_high>;
};
};
};

/*
* There are 10 independent IO domains in RK3566/RK3568, including PMUIO[0:2] and VCCIO[1:7].
* 1/ PMUIO0 and PMUIO1 are fixed-level power domains which cannot be configured;
* 2/ PMUIO2 and VCCIO1,VCCIO[3:7] domains require that their hardware power supply voltages
* must be consistent with the software configuration correspondingly
* a/ When the hardware IO level is connected to 1.8V, the software voltage configuration
* should also be configured to 1.8V accordingly;
* b/ When the hardware IO level is connected to 3.3V, the software voltage configuration
* should also be configured to 3.3V accordingly;
* 3/ VCCIO2 voltage control selection (0xFDC20140)
* BIT[0]: 0x0: from GPIO_0A7 (default)
* BIT[0]: 0x1: from GRF
* Default is determined by Pin FLASH_VOL_SEL/GPIO0_A7:
* L:VCCIO2 must supply 3.3V
* H:VCCIO2 must supply 1.8V
*/

&pmu_io_domains {
status = “okay”;
pmuio1-supply = <&vcc3v3_pmu>;
pmuio2-supply = <&vcc3v3_pmu>;
vccio1-supply = <&vcc_3v3>;
vccio2-supply = <&vcc_1v8>;
vccio3-supply = <&vccio_sd>;
vccio4-supply = <&vcc_1v8>;
vccio5-supply = <&vccio_phy>;
vccio6-supply = <&vcc_3v3>;
vccio7-supply = <&vcc_3v3>;
};

&rk_rga {
status = “okay”;
};

&rkvdec {
status = “okay”;
};

&rkvdec_mmu {
status = “okay”;
};

&rkvenc {
venc-supply = <&vdd_logic>;
status = “okay”;
};

&rkvenc_mmu {
status = “okay”;
};

&rknpu {
rknpu-supply = <&vdd_npu>;
status = “okay”;
};

&rknpu_mmu {
status = “okay”;
};

&route_hdmi {
status = “disabled”;
connect = <&vp0_out_hdmi>;
};

&saradc {
status = “okay”;
vref-supply = <&vcca_1v8>;
};

&sdhci {
bus-width = <8>;
no-sdio;
no-sd;
non-removable;
max-frequency = <200000000>;
pinctrl-names = “default”;
pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
status = “okay”;
};

&sdmmc0 {
max-frequency = <150000000>;
no-sdio;
no-mmc;
bus-width = <4>;
cap-mmc-highspeed;
cap-sd-highspeed;
disable-wp;
sd-uhs-sdr104;
vmmc-supply = <&vcc_sd>;
vqmmc-supply = <&vccio_sd>;
pinctrl-names = “default”;
pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
status = “okay”;
};

&sfc {
status = “okay”;
pinctrl-names = “default”;
pinctrl-0 = <&fspi_pins>;

flash@0 {
compatible = “jedec,spi-nor”;
reg = <0>;
spi-max-frequency = <100000000>;
spi-rx-bus-width = <4>;
spi-tx-bus-width = <1>;
};
};

&tsadc {
status = “okay”;
};

&u2phy0_host {
phy-supply = <&vbus>;
status = “okay”;
};

&u2phy0_otg {
vbus-supply = <&vcc5v0_otg>;
status = “okay”;
};

&u2phy1_host {
status = “okay”;
};

&u2phy1_otg {
status = “okay”;
};

&usb2phy0 {
status = “okay”;
};

&usb2phy1 {
status = “okay”;
};

&usb_host0_ehci {
status = “okay”;
};

&usb_host0_ohci {
status = “okay”;
};

&usb_host1_ehci {
status = “okay”;
};

&usb_host1_ohci {
status = “okay”;
};

&usbdrd_dwc3 {
dr_mode = “otg”;
extcon = <&usb2phy0>;
status = “okay”;
};

&usbdrd30 {
status = “okay”;
};

&usbhost_dwc3 {
status = “okay”;
};

&usbhost30 {
status = “okay”;
};

&vdpu {
status = “okay”;
};

&vdpu_mmu {
status = “okay”;
};

&vepu {
status = “okay”;
};

&vepu_mmu {
status = “okay”;
};

&vop {
status = “okay”;
assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
};

&vop_mmu {
status = “okay”;
};

&mdio1 {
rgmii_phy0: phy@0 {
compatible = “ethernet-phy-ieee802.3-c22”;
reg = <0x0>;
};
};

&gmac1 {
phy-mode = “rgmii”;
clock_in_out = “input”;

snps,reset-gpio = <&gpio4 RK_PC4 GPIO_ACTIVE_LOW>;
snps,reset-active-low;
/* Reset time is 20ms, 100ms for rtl8211f */
//snps,reset-delays-us = <0 20000 100000>;
snps,reset-delays-us = <0 50000 200000>;

assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>;
assigned-clock-rates = <0>, <125000000>;

pinctrl-names = “default”;
pinctrl-0 = <&gmac1m0_miim &gmac1m0_tx_bus2 &gmac1m0_rx_bus2 &gmac1m0_rgmii_clk &gmac1m0_clkinout &gmac1m0_rgmii_bus>;

tx_delay = <0x30>;
rx_delay = <0x10>;

phy-handle = <&rgmii_phy0>;
status = “okay”;
};

&sdmmc1 {
max-frequency = <150000000>;
no-sd;
no-mmc;
bus-width = <4>;
disable-wp;
cap-sd-highspeed;
cap-sdio-irq;
keep-power-in-suspend;
mmc-pwrseq = <&sdio_pwrseq>;
non-removable;
pinctrl-names = “default”;
pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>;
sd-uhs-sdr104;
status = “okay”;
};

&combphy1_usq {
status = “okay”;
};

&combphy2_psq {
status = “okay”;
};

&pcie2x1 {
reset-gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie>;
status = “okay”;
};

&vp0 {
rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER0 | 1 << ROCKCHIP_VOP2_ESMART0 | 1 << ROCKCHIP_VOP2_SMART0 | 1 << ROCKCHIP_VOP2_CLUSTER1 | 1 << ROCKCHIP_VOP2_ESMART1 | 1 << ROCKCHIP_VOP2_SMART1)>;
rockchip,primary-plane = ;
cursor-win-id = ;
};

&i2c1 {
status = “okay”;

ov5647: ov5647@36 {
status = “disabled”;
compatible = “ovti,ov5647”;
reg = <0x36>;
clocks = <&ext_cam_ov5647_clk>;
clock-names = “ext_cam_ov5647_clk”;
pwdn-gpios = <&gpio2 RK_PC6 GPIO_ACTIVE_LOW>;
rockchip,camera-module-index = <0>;
rockchip,camera-module-facing = “back”;
rockchip,camera-module-name = “LMM248”;
rockchip,camera-module-lens-name = “YXC-M804A2”;
port {
ov5647_out: endpoint {
remote-endpoint = <&dphy1_in>;
data-lanes = <1 2>;
};
};
};

raspits_panel: raspits-panel@45 {
status = “disabled”;
compatible = “raspberrypi,7inch-touchscreen-panel”;
reg = <0x45>;

port {
panel_in_dsi1: endpoint {
remote-endpoint = <&dsi1_out_panel>;
};
};
};

raspits_touch_ft5426: raspits-touch-ft5426@38 {
status = “disabled”;
compatible = “raspits_ft5426”;
reg = <0x38>;
};
};

&csi2_dphy_hw {
status = “disabled”;
};

&csi2_dphy0 {
status = “disabled”;
};

&csi2_dphy1 {
status = “disabled”;
/*
* dphy1 only used for split mode,
* can be used concurrently with dphy2
* full mode and split mode are mutually exclusive
*/
ports {
#address-cells = <1>;
#size-cells = <0>;

port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;

dphy1_in: endpoint@1 {
reg = <1>;
remote-endpoint = <&ov5647_out>;
data-lanes = <1 2>;
};
};

port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;

dphy1_out: endpoint@1 {
reg = <1>;
remote-endpoint = <&isp0_in>;
};
};
};
};

&rkisp {
status = “disabled”;
};

&rkisp_mmu {
status = “disabled”;
};

&rkisp_vir0 {
status = “disabled”;
port {
#address-cells = <1>;
#size-cells = <0>;

isp0_in: endpoint@0 {
reg = <0>;
remote-endpoint = <&dphy1_out>;
};
};
};

&edp {
status = “disabled”;
force-hpd;
hpd-gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
pinctrl-names = “default”;
pinctrl-0 = <&edp_hpd &bl_en>;

ports {
port@1 {
reg = <1>;

edp_out_panel: endpoint {
remote-endpoint = <&panel_in_edp>;
};
};
};
};

&edp_phy {
status = “disabled”;
};

&route_edp {
status = “disabled”;
};

&pwm2 {
status = “disabled”;
};

&dsi1 {
status = “disabled”;

ports {
port@1 {
reg = <1>;

dsi1_out_panel: endpoint {
remote-endpoint = <&panel_in_dsi1>;
};
};
};
};